On Fri, Mar 27, 2015 at 1:53 PM, Brian Gerst <brge...@gmail.com> wrote:
>> <-- IRQ. Boom
>
> The sti will delay interrupts for one instruction, and that should include
> NMIs.
Nope. Intel explicitly documents the NMI case only for mov->ss and popss.
> The Intel SDM states for STI:
> "The IF flag and the STI and CLI instructions do not prohibit the
> generation of exceptions and NMI interrupts. NMI
> interrupts (and SMIs) may be blocked for one macroinstruction following an
> STI."
Note the *may*. For movss and popss the software developer guide
explicitly says that NMI's are also blocked.
For plain sti, it seems to be dependent on microarchitecture.
Linus
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
