On 03/22/2015 03:24 PM, David Miller wrote:
From: Andrew Lunn <[email protected]>
Date: Sun, 22 Mar 2015 21:06:00 +0100
Hi Guenter
+static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, int fid, u16 cmd)
+{
+ int ret;
+
+ ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x01, fid);
+ if (ret < 0)
+ return ret;
Please could you check this. I think register 0x01 here is wrong. I
think you want 0x0b, the ATU Operations register?
Just want to mention that register mnenomics would have made this
bug more obvious :-)
Andrew is working on introducing those definitions, which is how he
found the problem. It is not a bug per se, though, since the register
definition changed across chip generations. The code works fine for
the chips we tested it with (6171, 6172, and 6352).
Guenter
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