>Of course using APIC internal timers is generally the best idea on SMP, >but they may have had reasons to avoid them (it's not an ISA interrupt, so >it could have been simply out of question in the initial design).
Best? No. Local APIC timers are based on a clock which on many processors will STOP when the processor enters power saving idle states, such as C3. So the LAPIC timer will not accurately reflect how much time has passed across entry/exit from idle. True, this has not been an issue on SMP, since there have not been SMP systems shipping with C3, but as you know soon everything interesting will be SMP... -Len - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
