Hi, Vinod, Could you please help review and merge this patch if possible. Thanks.
Thanks and Best Regards, Jingchang >>-----Original Message----- >>From: Jingchang Lu [mailto:[email protected]] >>Sent: Wednesday, October 22, 2014 4:54 PM >>To: [email protected] >>Cc: [email protected]; [email protected]; >>[email protected]; Lu Jingchang-B35083 >>Subject: [PATCHv4] dmaengine: fsl-edma: fixup reg offset and hw S/G >>support in big-endian model >> >>The offset of all 8-/16-bit registers in big-endian eDMA model are >>swapped in a 32-bit size opposite those in the little-endian model. >> >>The hardware Scatter/Gather requires the subsequent TCDs stored in >>memory in little endian independent of the register endian model, the >>eDMA engine will do the swap if need. >> >>This patch also use regular assignment for tcd variables r/w instead of >>with io function previously that may not always be true. >> >>Signed-off-by: Jingchang Lu <[email protected]> >>--- >>changes in v4: >> use __le32/16 define little endian tcd struct explicitly. >> modify fsl_edma_set_tcd_regs() to simplify parameters. >> define fsl_edma_fill_tcd() as inline function. >> >>changes in v3: >> use unsigned long instead of u32 in reg offset swap cast to avoid >warning. >> >>changes in v2: >> simplify register offset swap calculation. >> use regular assignment for tcd variables r/w instead of io function. >> >> drivers/dma/fsl-edma.c | 189 >>+++++++++++++++++++++++++------------------- >>----- >> 1 file changed, 96 insertions(+), 93 deletions(-)
