On 04/28/2014 03:12 PM, Andi Kleen wrote: > From: Andi Kleen <a...@linux.intel.com> > > Every gs selector/index reload always paid an extra MFENCE > between the two SWAPGS. This was to work around an old > bug in early K8 steppings. All other CPUs don't need the extra > mfence. Patch the extra MFENCE only in for K8. > > Signed-off-by: Andi Kleen <a...@linux.intel.com> > --- > arch/x86/include/asm/cpufeature.h | 1 + > arch/x86/kernel/cpu/amd.c | 3 +++ > arch/x86/kernel/entry_64.S | 10 +++++++++- > 3 files changed, 13 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/cpufeature.h > b/arch/x86/include/asm/cpufeature.h > index 89270b4..eb4bb46 100644 > --- a/arch/x86/include/asm/cpufeature.h > +++ b/arch/x86/include/asm/cpufeature.h > @@ -102,6 +102,7 @@ > #define X86_FEATURE_APERFMPERF (3*32+28) /* APERFMPERF */ > #define X86_FEATURE_EAGER_FPU (3*32+29) /* "eagerfpu" Non lazy FPU > restore */ > #define X86_FEATURE_NONSTOP_TSC_S3 (3*32+30) /* TSC doesn't stop in S3 state > */ > +#define X86_FEATURE_SWAPGS_MFENCE (3*32+31) /* SWAPGS may need MFENCE */ >
Nitpick: should be an X86_BUG_ instead. -hpa -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/