Add sdio clocks to the berlin2cd.dtsi
Also reorder the PLLs nodes by address
Signed-off-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>
---
arch/arm/boot/dts/berlin2cd.dtsi | 42 ++++++++++++++++++++++++++--------------
1 file changed, 28 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index bd4e9dd4867e..9b3faeee0728 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -79,20 +79,6 @@
clocks = <&twdclk>;
};
- syspll: syspll@ea0014 {
- compatible = "marvell,berlin2-pll";
- clocks = <&smclk>;
- #clock-cells = <0>;
- reg = <0xf7ea0014 8>;
- };
-
- cpupll: cpupll@ea003c {
- compatible = "marvell,berlin2-pll";
- clocks = <&smclk>;
- #clock-cells = <0>;
- reg = <0xf7ea003c 8>;
- };
-
apb@e80000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -183,6 +169,34 @@
};
};
+ syspll: syspll@ea0014 {
+ compatible = "marvell,berlin2-pll";
+ clocks = <&smclk>;
+ #clock-cells = <0>;
+ reg = <0xf7ea0014 8>;
+ };
+
+ cpupll: cpupll@ea003c {
+ compatible = "marvell,berlin2-pll";
+ clocks = <&smclk>;
+ #clock-cells = <0>;
+ reg = <0xf7ea003c 8>;
+ };
+
+ sdio0xinclk: sdio0xinclk@ea023c {
+ compatible = "marvell,berlin-clk";
+ clocks = <&syspll>;
+ #clock-cells = <0>;
+ reg = <0xea023c 4>;
+ };
+
+ sdio1xinclk: sdio1xinclk@ea0240 {
+ compatible = "marvell,berlin-clk";
+ clocks = <&syspll>;
+ #clock-cells = <0>;
+ reg = <0xea0240 4>;
+ };
+
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;
--
1.9.1
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