* Wang, Biao <biao.w...@intel.com> wrote:
> For tsc deadline mode, when we shut down clockevent we should disarm
> local-APIC timer like count-down mode.
>
> Signed-off-by: wang, biao <biao.w...@intel.com>
> Signed-off-by: Zhang Di <di.zh...@intel.com>
> ---
> arch/x86/kernel/apic/apic.c | 4 ++++
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index 7f26c9a..85889ba 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -512,6 +512,10 @@ static void lapic_timer_setup(enum clock_event_mode mode,
> v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
> apic_write(APIC_LVTT, v);
> apic_write(APIC_TMICT, 0);
> +
> + /*disarm timer in deadline mode*/
> + if (boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))
> + wrmsrl(MSR_IA32_TSC_DEADLINE, 0);
> break;
Please fix the changelog to conform to the standard changelog style:
- first describe the symptoms of the bug - how does a user notice?
- then describe how the code behaves today and how that is causing the bug
- and then only describe how it's fixed.
The first item is the most important one - while developers
(naturally) tend to concentrate on the least important point,
the last one.
Thanks,
Ingo
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