On Wed, Jan 22, 2014 at 01:07:57PM +0100, Peter Zijlstra wrote: > On Wed, Jan 22, 2014 at 01:00:48PM +0100, Markus Trippelsdorf wrote: > > FYI it happens on real hardware on my machine: > > ... > > [ 0.000000] Hierarchical RCU implementation. > > [ 0.000000] NR_IRQS:4352 nr_irqs:712 16 > > [ 0.000000] spurious 8259A interrupt: IRQ7. > > [ 0.000000] Console: colour VGA+ 80x25 > > [ 0.000000] console [tty0] enabled > > [ 0.000000] hpet clockevent registered > > [ 0.000000] tsc: Fast TSC calibration using PIT > > [ 0.003333] tsc: Detected 3210.681 MHz processor > > [ 60.375238] Calibrating delay loop (skipped), value calculated using > > timer frequency.. 6423.91 BogoMIPS (lpj=10702270) > > [ 60.375240] pid_max: default: 32768 minimum: 301 > > [ 60.375259] Mount-cache hash table entries: 256 > > [ 60.375373] tseg: 0000000000 > > [ 60.375377] CPU: Physical Processor ID: 0 > > [ 60.375377] CPU: Processor Core ID: 0 > > [ 60.375378] mce: CPU supports 6 MCE banks > > [ 60.375382] LVT offset 0 assigned for vector 0xf9 > > [ 60.375384] process: using AMD E400 aware idle routine > > [ 60.375386] Last level iTLB entries: 4KB 512, 2MB 16, 4MB 8 > > Should have always happened like that I think. From the log it looks > like the moment we switch from jiffies to actual TSC in > arch/x86/kernel/tsc.c:sched_clock(). > > I don't think I changed the logic there, just switched from a condition > to a jump_label.
On that, the bestest solution is to completely rip out the no_tsc option, its daft. The few people still running chips without TSC can use X86_TSC=n. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
