2013/4/23 Jacob Shin <jacob.s...@amd.com>:
> From: Jacob Shin <jacob.s...@amd.com>
> Date: Mon, 22 Apr 2013 17:02:37 -0500
> Subject: [PATCH 1/4] perf: Add hardware breakpoint address mask
>
> Some architectures (for us, AMD Family 16h) allow for "don't care" bit
> mask to further qualify a hardware breakpoint address, in order to
> trap on range of addresses. Update perf uapi to add bp_addr_mask field.
It would be nice to describe a bit what this "don't care" bit mask is
about. Is it a range of address/bitmask to ignore in the middle of the
range we want to breakpoint in? I mean, that's confusing.
>
> Signed-off-by: Jacob Shin <jacob.s...@amd.com>
> ---
> include/uapi/linux/perf_event.h | 5 ++++-
> kernel/events/hw_breakpoint.c | 9 +++++++++
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index fb104e5..e22e1d1 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -286,7 +286,10 @@ struct perf_event_attr {
> __u64 config1; /* extension of config */
> };
> union {
> - __u64 bp_len;
> + struct {
> + __u32 bp_len;
> + __u32 bp_addr_mask;
> + };
Do we need len and mask to work at the same time? I can't think of a
situation when len and mask mix up together in a useful way to define
a range.
Thanks.
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