The clock needs to be activated for the check to work. In order to be compatible
with future silicon make sure that at least 1 pin is available before probing
the pad controller.
Signed-off-by: Thomas Langer <thomas.lan...@lantiq.com>
Signed-off-by: John Crispin <blo...@openwrt.org>
---
drivers/pinctrl/pinctrl-falcon.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 4a0d54a..de9d1db 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -455,12 +455,17 @@ static int pinctrl_falcon_probe(struct platform_device
*pdev)
*bank);
return -ENOMEM;
}
+ clk_activate(falcon_info.clk[*bank]);
avail = pad_r32(falcon_info.membase[*bank],
LTQ_PADC_AVAIL);
pins = fls(avail);
- lantiq_load_pin_desc(&falcon_pads[pad_count], *bank, pins);
- pad_count += pins;
- clk_enable(falcon_info.clk[*bank]);
+ if (pins) {
+ lantiq_load_pin_desc(&falcon_pads[pad_count],
+ *bank, pins);
+ pad_count += pins;
+ } else {
+ clk_deactivate(falcon_info.clk[*bank]);
+ }
dev_dbg(&pdev->dev, "found %s with %d pads\n",
res.name, pins);
}
--
1.7.10.4
--
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