On 1/18/2013 4:35 PM, H. Peter Anvin wrote: > On 01/18/2013 05:05 PM, Mitch Bradley wrote: >> >> >> On 1/18/2013 2:42 PM, H. Peter Anvin wrote: >>> On 01/18/2013 04:40 PM, Andres Salomon wrote: >>>> Bad news on this patch; I've been told that it breaks booting on an >>>> XO-1.5. Does anyone from OLPC know why yet? >>> >>> What are the settings of CR0 and CR4 on kernel entry on XO-1.5? >> >> >> CR0 is 0x80000011 >> CR4 is 0x10 >> > > OK, that makes sense... the kernel doesn't enable the PSE bit yet and I > bet that's what you're using for the non-stolen page tables.
Indeed, we are using 4M pages to map the firmware into high virtual addresses. > > Can we simply disable paging before mucking with CR4? The other option > that I can see is to always enable PSE and PGE, since they are simply > features opt-ins that don't do any harm if unused. At the same time, > though, entering the kernel through the default_entry path with paging > enabled is definitely not anything the kernel expects. > > Does this patch work for you? Since we have ditched 386 support, we can > mimic x86-64 (yay, one more difference gone!) and just use a predefined > value for %cr0 (the FPU flags need to change if we are on an FPU-less > chip, but that happens during FPU probing.) > > Does this patch work for you? We will test it and get back to you. > > -hpa > > > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
