3.2-stable review patch. If anyone has any objections, please let me know.
------------------
From: Rajkumar Manoharan <rmano...@qca.qualcomm.com>
commit 1680260226a8fd2aab590319da83ad8e610da9bd upstream.
This reduced the power consumption to half in full and network sleep.
Cc: Paul Stewart <ps...@chromium.org>
Signed-off-by: Rajkumar Manoharan <rmano...@qca.qualcomm.com>
Signed-off-by: John W. Linville <linvi...@tuxdriver.com>
[bwh: Backported to 3.2:
- INIT_INI_ARRAY macro requires an explicit size argument
- Remove the now-redundant macro PCIE_PLL_ON_CREQ_DIS_L1_2P0]
Signed-off-by: Ben Hutchings <b...@decadent.org.uk>
---
drivers/net/wireless/ath/ath9k/ar9003_hw.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -34,9 +34,6 @@
*/
static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
{
-#define PCIE_PLL_ON_CREQ_DIS_L1_2P0 \
- ar9462_pciephy_pll_on_clkreq_disable_L1_2p0
-
#define AR9462_BB_CTX_COEFJ(x) \
ar9462_##x##_baseband_core_txfir_coeff_japan_2484
@@ -369,13 +366,13 @@ static void ar9003_hw_init_mode_regs(str
/* Awake -> Sleep Setting */
INIT_INI_ARRAY(&ah->iniPcieSerdes,
- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
+ ar9462_pciephy_clkreq_disable_L1_2p0,
+
ARRAY_SIZE(ar9462_pciephy_clkreq_disable_L1_2p0),
2);
/* Sleep -> Awake Setting */
INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
+ ar9462_pciephy_clkreq_disable_L1_2p0,
+
ARRAY_SIZE(ar9462_pciephy_clkreq_disable_L1_2p0),
2);
/* Fast clock modal settings */
--
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