> Right, but at least in the csrow case, we still can compute back the > csrow even with the interleaving, after we know how it is done exactly > (on which address bits, etc). I think this should be doable on Intel > controllers too but I don't know.
No. Architecturally all Intel provides is the physical address in MCi_ADDR. To do anything with that you are into per-system space, and the registers that define the mappings are not necessarily available to OS code ... sometimes they are, and sometimes they are even documented in places where Mauro can use them to write an EDAC driver ... but there are no guarantees. -Tony
