From: Stephen Boyd <sb...@codeaurora.org>
Add the timer entry and point the machine descriptor to the
device tree based msm timer.
Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
[dav...@codeaurora.org: Remove leading zeros]
Signed-off-by: David Brown <dav...@codeaurora.org>
---
arch/arm/boot/dts/msm8660-surf.dts | 19 ++++++++++++++++++-
arch/arm/mach-msm/board-msm8x60.c | 2 +-
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/msm8660-surf.dts
b/arch/arm/boot/dts/msm8660-surf.dts
index 45bc4bb..31f2157 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -7,7 +7,7 @@
compatible = "qcom,msm8660-surf", "qcom,msm8660";
interrupt-parent = <&intc>;
- intc: interrupt-controller@02080000 {
+ intc: interrupt-controller@2080000 {
compatible = "qcom,msm-8660-qgic";
interrupt-controller;
#interrupt-cells = <3>;
@@ -15,6 +15,23 @@
< 0x02081000 0x1000 >;
};
+ timer@2000004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 1 0x301>;
+ reg = <0x02000004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x40000>;
+ };
+
+ timer@2000024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 0 0x301>;
+ reg = <0x02000024 0x10>,
+ <0x02000034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x40000>;
+ };
+
serial@19c400000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,
diff --git a/arch/arm/mach-msm/board-msm8x60.c
b/arch/arm/mach-msm/board-msm8x60.c
index 97db3cd..64c981d 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -154,7 +154,7 @@ DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device
Tree)")
.handle_irq = gic_handle_irq,
.init_machine = msm8x60_dt_init,
.init_late = msm8x60_init_late,
- .timer = &msm8x60_timer,
+ .timer = &msm_dt_timer,
.dt_compat = msm8x60_fluid_match,
MACHINE_END
#endif /* CONFIG_OF */
--
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