On Tuesday 21 August 2012, Viresh Kumar wrote:
> On 21 August 2012 14:04, Arnd Bergmann <arnd.bergm...@linaro.org> wrote:
>
> > Yes, this is very strange. Maybe the compiler already splits the
> > access into two 16-byte loads and that confuses the device?
>
> @Arnd: Is compiler allowed to do that even when we have volatile specified
> for the access? It shouldn't optimize the access at all i believe.
Yes. The "volatile" keyword implies that the compiler has to do the access
exactly once and that it cannot reorder the access with others on the same
address, or read more data than is specified, but it can (and does) split
the access if there is a reason for that, e.g. when the address might
be misaligned and the architecture cannot do misaligned loads.
Arnd
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