On Wed, 23 Sept 2026 at 16:16, Lorenzo Stoakes (ARM) <[email protected]> wrote:
>
> Add helper functions which operate directly on an ESR value rather than
> trying to access the register itself.
>
> These mirror equivalent KVM vCPU wrappers in kvm_emulate.h and allow those
> wrappers and KVM's stage-2 fault handling to operate on a plain ESR value.
>
> This is needed to later generate a synthetic fault for the stage-2 page
> table pre-faulting mechanism.
>
> No functional change intended.
>
> Reviewed-by: Oliver Upton <[email protected]>
> Signed-off-by: Lorenzo Stoakes (ARM) <[email protected]>

Reviewed-by: Fuad Tabba <[email protected]>

Cheers,
/fuad

> ---
>  arch/arm64/include/asm/esr.h         | 29 +++++++++++++++++++++++++++++
>  arch/arm64/include/asm/kvm_emulate.h | 10 ++++++++++
>  2 files changed, 39 insertions(+)
>
> diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
> index f816f5d77f1a..86756fc9bb5a 100644
> --- a/arch/arm64/include/asm/esr.h
> +++ b/arch/arm64/include/asm/esr.h
> @@ -437,6 +437,35 @@
>  #ifndef __ASSEMBLER__
>  #include <asm/types.h>
>
> +static __always_inline bool esr_trap_is_iabt(unsigned long esr)
> +{
> +       return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
> +}
> +
> +/* Always check for S1PTW *before* using this. */
> +static __always_inline bool esr_dabt_is_write(unsigned long esr)
> +{
> +       return esr & ESR_ELx_WNR;
> +}
> +
> +static __always_inline bool esr_dabt_is_cm(unsigned long esr)
> +{
> +       return esr & ESR_ELx_CM;
> +}
> +
> +static __always_inline bool esr_abt_is_sea(unsigned long esr)
> +{
> +       switch (esr & ESR_ELx_FSC) {
> +       case ESR_ELx_FSC_EXTABT:
> +       case ESR_ELx_FSC_SEA_TTW(-1) ... ESR_ELx_FSC_SEA_TTW(3):
> +       case ESR_ELx_FSC_SECC:
> +       case ESR_ELx_FSC_SECC_TTW(-1) ... ESR_ELx_FSC_SECC_TTW(3):
> +               return true;
> +       default:
> +               return false;
> +       }
> +}
> +
>  static inline unsigned long esr_brk_comment(unsigned long esr)
>  {
>         return esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
> diff --git a/arch/arm64/include/asm/kvm_emulate.h 
> b/arch/arm64/include/asm/kvm_emulate.h
> index a3c1928bdf74..654e8c1b4461 100644
> --- a/arch/arm64/include/asm/kvm_emulate.h
> +++ b/arch/arm64/include/asm/kvm_emulate.h
> @@ -336,6 +336,16 @@ static __always_inline u64 kvm_vcpu_get_esr(const struct 
> kvm_vcpu *vcpu)
>         return vcpu->arch.fault.esr_el2;
>  }
>
> +static __always_inline bool esr_abt_is_s1ptw(unsigned long esr)
> +{
> +       return esr & ESR_ELx_S1PTW;
> +}
> +
> +static __always_inline bool esr_abt_is_exec_fault(unsigned long esr)
> +{
> +       return esr_trap_is_iabt(esr) && !esr_abt_is_s1ptw(esr);
> +}
> +
>  static inline bool guest_hyp_wfx_traps_enabled(const struct kvm_vcpu *vcpu)
>  {
>         u64 esr = kvm_vcpu_get_esr(vcpu);
>
> --
> 2.55.0
>

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