Add the offsets for two resets inside the dispcc on SM6350 SoC.
Signed-off-by: Luca Weiss <luca.we...@fairphone.com>
---
drivers/clk/qcom/dispcc-sm6350.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/qcom/dispcc-sm6350.c b/drivers/clk/qcom/dispcc-sm6350.c
index
b0bd163a449ccd2b27751e32eb17a982facf07d8..5b1d8f86515f251d90e01a4f3cb3b5582b5db683
100644
--- a/drivers/clk/qcom/dispcc-sm6350.c
+++ b/drivers/clk/qcom/dispcc-sm6350.c
@@ -679,6 +679,11 @@ static struct clk_branch disp_cc_xo_clk = {
},
};
+static const struct qcom_reset_map disp_cc_sm6350_resets[] = {
+ [DISP_CC_MDSS_CORE_BCR] = { 0x1000 },
+ [DISP_CC_MDSS_RSCC_BCR] = { 0x2000 },
+};
+
static struct gdsc mdss_gdsc = {
.gdscr = 0x1004,
.en_rest_wait_val = 0x2,
@@ -746,6 +751,8 @@ static const struct qcom_cc_desc disp_cc_sm6350_desc = {
.num_clks = ARRAY_SIZE(disp_cc_sm6350_clocks),
.gdscs = disp_cc_sm6350_gdscs,
.num_gdscs = ARRAY_SIZE(disp_cc_sm6350_gdscs),
+ .resets = disp_cc_sm6350_resets,
+ .num_resets = ARRAY_SIZE(disp_cc_sm6350_resets),
};
static const struct of_device_id disp_cc_sm6350_match_table[] = {
--
2.51.0
