On 2025-04-25 9:43 a.m., Peter Zijlstra wrote:
> On Fri, Apr 25, 2025 at 09:06:26AM -0400, Liang, Kan wrote:
>>
>>
>> On 2025-04-25 7:15 a.m., Peter Zijlstra wrote:
>>> On Mon, Mar 24, 2025 at 05:30:50PM +0000, Mingwei Zhang wrote:
>>>> From: Kan Liang <kan.li...@linux.intel.com>
>>>>
>>>> Implement switch_guest_ctx interface for x86 PMU, switch PMI to dedicated
>>>> KVM_GUEST_PMI_VECTOR at perf guest enter, and switch PMI back to
>>>> NMI at perf guest exit.
>>>>
>>>> Signed-off-by: Xiong Zhang <xiong.y.zh...@linux.intel.com>
>>>> Signed-off-by: Kan Liang <kan.li...@linux.intel.com>
>>>> Tested-by: Yongwei Ma <yongwei...@intel.com>
>>>> Signed-off-by: Mingwei Zhang <mizh...@google.com>
>>>> ---
>>>> arch/x86/events/core.c | 12 ++++++++++++
>>>> 1 file changed, 12 insertions(+)
>>>>
>>>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>>>> index 8f218ac0d445..28161d6ff26d 100644
>>>> --- a/arch/x86/events/core.c
>>>> +++ b/arch/x86/events/core.c
>>>> @@ -2677,6 +2677,16 @@ static bool x86_pmu_filter(struct pmu *pmu, int cpu)
>>>> return ret;
>>>> }
>>>>
>>>> +static void x86_pmu_switch_guest_ctx(bool enter, void *data)
>>>> +{
>>>> + u32 guest_lvtpc = *(u32 *)data;
>>>> +
>>>> + if (enter)
>>>> + apic_write(APIC_LVTPC, guest_lvtpc);
>>>> + else
>>>> + apic_write(APIC_LVTPC, APIC_DM_NMI);
>>>> +}
>>>
>>> This, why can't it use x86_pmu.guest_lvtpc here and call it a day? Why
>>> is that argument passed around through the generic code only to get back
>>> here?
>>
>> The vector has to be from the KVM. However, the current interfaces only
>> support KVM read perf variables, e.g., perf_get_x86_pmu_capability and
>> perf_get_hw_event_config.
>> We need to add an new interface to allow the KVM write a perf variable,
>> e.g., perf_set_guest_lvtpc.
>
> But all that should remain in x86, there is no reason what so ever to
> leak this into generic code.
>
Sure. I will change it in the V5.
Thanks,
Kan
