In Documentation/devicetree/bindings/riscv/cpus.yaml I find for riscv,isa:

    enum:
      - rv64imac
      - rv64imafdc

This implies that 'rv64imafc' or 'rv64imafdqc' would be illegal values
while these combinations of extensions would be compliant with "The
RISC-V Instruction Set Manual".

To me it does not make much sense to try to enumerate all permissible
permutations of RISC-V extensions.

Shouldn't this enum be removed and replaced by examples?

Best regards

Heinrich

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