On Fri, 19 Feb 2021 at 17:04, Abel Vesa <abel.v...@nxp.com> wrote:
>
> Add all the pl301s found on i.MX8MQ, according to the bus diagram.
> Each pl301 has its own clock, icc id and opp table. They are probed
> by the imx-bus driver.
>
> Signed-off-by: Abel Vesa <abel.v...@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 180 ++++++++++++++++++++++
> 1 file changed, 180 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index e30e948648e9..5f9ffa465d6c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1447,5 +1447,185 @@ ddr-pmu@3d800000 {
> interrupt-parent = <&gic>;
> interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> };
> +
> + pl301_main: pl301@0 {
> + compatible = "fsl,imx8m-nic";
Does it pass dtc W=1 and dtbs_check without the "reg" property?
Please also name the node in a generic way (see for example DT spec
"2.2.2 Generic Names Recommendation").
Best regards,
Krzysztof
