Alan Cox wrote:
The natsemi docs here say otherwise. I trust them not you.
As well you should. I am honestly curious (for my own satisfaction) as
to what the natsemi docs say the delay code should do (can't imagine
they say "use io port 80 because it is unused"). I don't have any
copies anymore. But mere curiosity on my part is not worth spending a
lot of time on - I know you are super busy. If there's a copy online
at a URL ...
The problem is that certain people, unfortunately those who know
nothing about ISA related bus systems, keep trying to confuse ISA delay
logic with core chip logic and end up trying to solve both a problem and a
non-problem in one, creating a nasty mess in the process.
I agree that the problems of chip logic and ISA delay are all tangled
up, probably more than need be. I hope that the solution turns out to
simplify matters, and hopefully to document the intention of the
resulting code sections a bit more clearly for the future.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
