On Sun, Jan 24, 2021 at 12:44:43PM +0000, Russell King - ARM Linux admin wrote:
> On Sun, Jan 24, 2021 at 01:43:52PM +0200, stef...@marvell.com wrote:
> > + priv->sram_pool = of_gen_pool_get(dn, "cm3-mem", 0);
> > + if (!priv->sram_pool) {
> > + if (!defer_once) {
> > + defer_once = true;
> > + /* Try defer once */
> > + return -EPROBE_DEFER;
> > + }
> > + dev_warn(&pdev->dev, "DT is too old, Flow control not
> > supported\n");
> > + return -ENOMEM;
> > + }
> > + priv->cm3_base = (void __iomem *)gen_pool_alloc(priv->sram_pool,
> > + MSS_SRAM_SIZE);
> > + if (!priv->cm3_base)
> > + return -ENOMEM;
>
> This probably could do with a comment indicating that it is reliant on
> this allocation happening at offset zero into the SRAM. The only reason
> that is guaranteed _at the moment_ is because the SRAM mapping is 0x800
> bytes in size, and you are requesting 0x800 bytes in this allocation,
> so allocating the full size.
Hi Russell
I'm wondering if using a pool even makes sense. The ACPI case just
ioremap() the memory region. Either this memory is dedicated, and then
there is no need to use a pool, or the memory is shared, and at some
point the ACPI code is going to run into problems when some other
driver also wants access.
Andrew
