According the PCI spec:
  Bus Master Enable – Controls the ability of a PCI Express
  Endpoint to issue Memory and I/O Read/Write Requests, and
  the ability of a Root or Switch Port to forward Memory and
  I/O Read/Write Requests in the Upstream direction

Set BusMaster to make the driver to be PCI conformant.

Signed-off-by: Longpeng(Mike) <longpe...@huawei.com>
---
 drivers/virt/nitro_enclaves/ne_pci_dev.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/virt/nitro_enclaves/ne_pci_dev.c 
b/drivers/virt/nitro_enclaves/ne_pci_dev.c
index b9c1de4..143207e 100644
--- a/drivers/virt/nitro_enclaves/ne_pci_dev.c
+++ b/drivers/virt/nitro_enclaves/ne_pci_dev.c
@@ -480,6 +480,8 @@ static int ne_pci_probe(struct pci_dev *pdev, const struct 
pci_device_id *id)
                goto free_ne_pci_dev;
        }
 
+       pci_set_master(pdev);
+
        rc = pci_request_regions_exclusive(pdev, "nitro_enclaves");
        if (rc < 0) {
                dev_err(&pdev->dev, "Error in pci request regions [rc=%d]\n", 
rc);
-- 
1.8.3.1

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