From: Vinod Koul <vk...@kernel.org>

This adds DTS for PMIC PMX55 found in Qualcomm platforms.

Signed-off-by: Vinod Koul <vk...@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
---
 arch/arm/boot/dts/qcom-pmx55.dtsi | 91 +++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
 create mode 100644 arch/arm/boot/dts/qcom-pmx55.dtsi

diff --git a/arch/arm/boot/dts/qcom-pmx55.dtsi 
b/arch/arm/boot/dts/qcom-pmx55.dtsi
new file mode 100644
index 000000000000..05f033334716
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-pmx55.dtsi
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020, Linaro Limited
+ */
+
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+       pmic@8 {
+               compatible = "qcom,pmx55", "qcom,spmi-pmic";
+               reg = <0x8 SPMI_USID>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               power-on@800 {
+                       compatible = "qcom,pm8916-pon";
+                       reg = <0x0800>;
+
+                       status = "disabled";
+               };
+
+               pmx55_temp: temp-alarm@2400 {
+                       compatible = "qcom,spmi-temp-alarm";
+                       reg = <0x2400>;
+                       interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+                       io-channels = <&pmx55_adc ADC5_DIE_TEMP>;
+                       io-channel-names = "thermal";
+                       #thermal-sensor-cells = <0>;
+               };
+
+               pmx55_adc: adc@3100 {
+                       compatible = "qcom,spmi-adc5";
+                       reg = <0x3100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #io-channel-cells = <1>;
+                       interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+                       ref-gnd@0 {
+                               reg = <ADC5_REF_GND>;
+                               qcom,pre-scaling = <1 1>;
+                               label = "ref_gnd";
+                       };
+
+                       vref-1p25@1 {
+                               reg = <ADC5_1P25VREF>;
+                               qcom,pre-scaling = <1 1>;
+                               label = "vref_1p25";
+                       };
+
+                       die-temp@6 {
+                               reg = <ADC5_DIE_TEMP>;
+                               qcom,pre-scaling = <1 1>;
+                               label = "die_temp";
+                       };
+
+                       chg-temp@9 {
+                               reg = <ADC5_CHG_TEMP>;
+                               qcom,pre-scaling = <1 1>;
+                               label = "chg_temp";
+                       };
+               };
+
+               pmx55_gpios: gpio@c000 {
+                       compatible = "qcom,pmx55-gpio", "qcom,spmi-gpio";
+                       reg = <0xc000>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       interrupts = <0x8 0xc0 0x0 IRQ_TYPE_NONE>,
+                                    <0x8 0xc1 0x0 IRQ_TYPE_NONE>,
+                                    <0x8 0xc3 0x0 IRQ_TYPE_NONE>,
+                                    <0x8 0xc4 0x0 IRQ_TYPE_NONE>,
+                                    <0x8 0xc5 0x0 IRQ_TYPE_NONE>,
+                                    <0x8 0xc7 0x0 IRQ_TYPE_NONE>,
+                                    <0x8 0xc8 0x0 IRQ_TYPE_NONE>;
+               };
+       };
+
+       pmic@9 {
+               compatible = "qcom,pmx55", "qcom,spmi-pmic";
+               reg = <0x9 SPMI_USID>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+};
-- 
2.25.1

Reply via email to