Hi Philipp, Thank you for the patch! Yet something to improve:
[auto build test ERROR on abelloni/rtc-next] [also build test ERROR on v5.11-rc2 next-20210104] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Philipp-Rosenberger/rtc-pcf2127-proper-initilize-rtc-after-power-loss/20210105-002256 base: https://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux.git rtc-next config: parisc-randconfig-r006-20210105 (attached as .config) compiler: hppa-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/ac3cb31420b7b402d9deda24768725e3b956ccf5 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Philipp-Rosenberger/rtc-pcf2127-proper-initilize-rtc-after-power-loss/20210105-002256 git checkout ac3cb31420b7b402d9deda24768725e3b956ccf5 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=parisc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <l...@intel.com> All errors (new ones prefixed by >>): drivers/rtc/rtc-pcf2127.c: In function 'pcf2127_probe': >> drivers/rtc/rtc-pcf2127.c:622:5: error: 'PCF2127_BIT_CTRL1_POR_OVRD' >> undeclared (first use in this function); did you mean >> 'PCF2127_BIT_CTRL1_TSF1'? 622 | PCF2127_BIT_CTRL1_POR_OVRD); | ^~~~~~~~~~~~~~~~~~~~~~~~~~ | PCF2127_BIT_CTRL1_TSF1 drivers/rtc/rtc-pcf2127.c:622:5: note: each undeclared identifier is reported only once for each function it appears in vim +622 drivers/rtc/rtc-pcf2127.c 561 562 static int pcf2127_probe(struct device *dev, struct regmap *regmap, 563 int alarm_irq, const char *name, bool has_nvmem) 564 { 565 struct pcf2127 *pcf2127; 566 int ret = 0; 567 568 dev_dbg(dev, "%s\n", __func__); 569 570 pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL); 571 if (!pcf2127) 572 return -ENOMEM; 573 574 pcf2127->regmap = regmap; 575 576 dev_set_drvdata(dev, pcf2127); 577 578 pcf2127->rtc = devm_rtc_allocate_device(dev); 579 if (IS_ERR(pcf2127->rtc)) 580 return PTR_ERR(pcf2127->rtc); 581 582 pcf2127->rtc->ops = &pcf2127_rtc_ops; 583 pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 584 pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099; 585 pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */ 586 pcf2127->rtc->uie_unsupported = 1; 587 588 if (alarm_irq > 0) { 589 ret = devm_request_threaded_irq(dev, alarm_irq, NULL, 590 pcf2127_rtc_irq, 591 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 592 dev_name(dev), dev); 593 if (ret) { 594 dev_err(dev, "failed to request alarm irq\n"); 595 return ret; 596 } 597 } 598 599 if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) { 600 device_init_wakeup(dev, true); 601 pcf2127->rtc->ops = &pcf2127_rtc_alrm_ops; 602 } 603 604 if (has_nvmem) { 605 struct nvmem_config nvmem_cfg = { 606 .priv = pcf2127, 607 .reg_read = pcf2127_nvmem_read, 608 .reg_write = pcf2127_nvmem_write, 609 .size = 512, 610 }; 611 612 ret = devm_rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg); 613 } 614 615 /* 616 * Disable the Power-On Reset Override facility to start normal 617 * operation. If the operation should fail, just move on. The RTC should 618 * work fine, but functions like watchdog and alarm interrupts might 619 * not work. 620 */ 621 ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1, > 622 PCF2127_BIT_CTRL1_POR_OVRD); 623 if (ret) { 624 dev_err(dev, "%s: can't disable PORO (ctrl1).\n", __func__); 625 dev_warn(dev, "Watchdog and alarm functions might not work properly\n"); 626 } 627 628 /* 629 * Watchdog timer enabled and reset pin /RST activated when timed out. 630 * Select 1Hz clock source for watchdog timer. 631 * Note: Countdown timer disabled and not available. 632 */ 633 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL, 634 PCF2127_BIT_WD_CTL_CD1 | 635 PCF2127_BIT_WD_CTL_CD0 | 636 PCF2127_BIT_WD_CTL_TF1 | 637 PCF2127_BIT_WD_CTL_TF0, 638 PCF2127_BIT_WD_CTL_CD1 | 639 PCF2127_BIT_WD_CTL_CD0 | 640 PCF2127_BIT_WD_CTL_TF1); 641 if (ret) { 642 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__); 643 return ret; 644 } 645 646 pcf2127_watchdog_init(dev, pcf2127); 647 648 /* 649 * Disable battery low/switch-over timestamp and interrupts. 650 * Clear battery interrupt flags which can block new trigger events. 651 * Note: This is the default chip behaviour but added to ensure 652 * correct tamper timestamp and interrupt function. 653 */ 654 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, 655 PCF2127_BIT_CTRL3_BTSE | 656 PCF2127_BIT_CTRL3_BIE | 657 PCF2127_BIT_CTRL3_BLIE, 0); 658 if (ret) { 659 dev_err(dev, "%s: interrupt config (ctrl3) failed\n", 660 __func__); 661 return ret; 662 } 663 664 /* 665 * Enable timestamp function and store timestamp of first trigger 666 * event until TSF1 and TFS2 interrupt flags are cleared. 667 */ 668 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL, 669 PCF2127_BIT_TS_CTRL_TSOFF | 670 PCF2127_BIT_TS_CTRL_TSM, 671 PCF2127_BIT_TS_CTRL_TSM); 672 if (ret) { 673 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n", 674 __func__); 675 return ret; 676 } 677 678 /* 679 * Enable interrupt generation when TSF1 or TSF2 timestamp flags 680 * are set. Interrupt signal is an open-drain output and can be 681 * left floating if unused. 682 */ 683 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2, 684 PCF2127_BIT_CTRL2_TSIE, 685 PCF2127_BIT_CTRL2_TSIE); 686 if (ret) { 687 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n", 688 __func__); 689 return ret; 690 } 691 692 ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group); 693 if (ret) { 694 dev_err(dev, "%s: tamper sysfs registering failed\n", 695 __func__); 696 return ret; 697 } 698 699 return devm_rtc_register_device(pcf2127->rtc); 700 } 701 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
