This introduces definitions for the PWM controller found in the V3s,
as well as associated pins. This fashion of the controller has two PWM
outputs and is register-compatible with the A20.

Both PWM outputs were tested on a Lichee Pi Zero with a simple
transistor-LED setup.

Signed-off-by: Paul Kocialkowski <cont...@paulk.fr>
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index a9f5795d4e57..34a4e638c762 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -398,6 +398,16 @@ spi0_pins: spi0-pins {
                                pins = "PC0", "PC1", "PC2", "PC3";
                                function = "spi0";
                        };
+
+                       pwm0_pin: pwm0-pin {
+                               pins = "PB4";
+                               function = "pwm0";
+                       };
+
+                       pwm1_pin: pwm1-pin {
+                               pins = "PB5";
+                               function = "pwm1";
+                       };
                };
 
                timer@1c20c00 {
@@ -416,6 +426,14 @@ wdt0: watchdog@1c20ca0 {
                        clocks = <&osc24M>;
                };
 
+               pwm: pwm@1c21400 {
+                       compatible = "allwinner,sun7i-a20-pwm";
+                       reg = <0x01c21400 0xc>;
+                       clocks = <&osc24M>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                lradc: lradc@1c22800 {
                        compatible = "allwinner,sun4i-a10-lradc-keys";
                        reg = <0x01c22800 0x400>;
-- 
2.29.2

Reply via email to