[PATCH v2, 05/17] drm/mediatek: add component POSTMASK

[Yongqiang Niu]

This patch add component POSTMASK

Signed-off-by: Yongqiang Niu <yongqiang....@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 31 +++++++++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |  1 +
 include/linux/soc/mediatek/mtk-mmsys.h      |  1 +
 3 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c 
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 8938554..4c91584 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -60,6 +60,10 @@
 #define DISP_GAMMA_SIZE                                0x0030
 #define DISP_GAMMA_LUT                         0x0700
 
+#define DISP_POSTMASK_EN                       0x0000
+#define DISP_POSTMASK_CFG                      0x0020
+#define DISP_POSTMASK_SIZE                     0x0030
+
 #define LUT_10BIT_MASK                         0x03ff
 
 #define OD_RELAYMODE                           BIT(0)
@@ -321,6 +325,24 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
        }
 }
 
+static void mtk_postmask_config(struct mtk_ddp_comp *comp, unsigned int w,
+                             unsigned int h, unsigned int vrefresh,
+                             unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+       mtk_ddp_write(cmdq_pkt, w << 16 | h, comp, DISP_POSTMASK_SIZE);
+       mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, comp, DISP_POSTMASK_CFG);
+}
+
+static void mtk_postmask_start(struct mtk_ddp_comp *comp)
+{
+       writel(DITHER_EN, comp->regs + DISP_POSTMASK_EN);
+}
+
+static void mtk_postmask_stop(struct mtk_ddp_comp *comp)
+{
+       writel_relaxed(0x0, comp->regs + DISP_POSTMASK_EN);
+}
+
 static const struct mtk_ddp_comp_funcs ddp_aal = {
        .gamma_set = mtk_gamma_set,
        .config = mtk_aal_config,
@@ -348,6 +370,12 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
        .stop = mtk_gamma_stop,
 };
 
+static const struct mtk_ddp_comp_funcs ddp_postmask = {
+       .config = mtk_postmask_config,
+       .start = mtk_postmask_start,
+       .stop = mtk_postmask_stop,
+};
+
 static const struct mtk_ddp_comp_funcs ddp_od = {
        .config = mtk_od_config,
        .start = mtk_od_start,
@@ -374,6 +402,7 @@ static void mtk_gamma_set(struct mtk_ddp_comp *comp,
        [MTK_DISP_MUTEX] = "mutex",
        [MTK_DISP_OD] = "od",
        [MTK_DISP_BLS] = "bls",
+       [MTK_DISP_POSTMASK] = "postmask",
 };
 
 struct mtk_ddp_comp_match {
@@ -404,6 +433,8 @@ struct mtk_ddp_comp_match {
        [DDP_COMPONENT_OVL_2L0] = { MTK_DISP_OVL_2L,    0, NULL },
        [DDP_COMPONENT_OVL_2L1] = { MTK_DISP_OVL_2L,    1, NULL },
        [DDP_COMPONENT_OVL_2L2] = { MTK_DISP_OVL_2L,    2, NULL },
+       [DDP_COMPONENT_POSTMASK0]
+                               = { MTK_DISP_POSTMASK,  0, &ddp_postmask },
        [DDP_COMPONENT_PWM0]    = { MTK_DISP_PWM,       0, NULL },
        [DDP_COMPONENT_PWM1]    = { MTK_DISP_PWM,       1, NULL },
        [DDP_COMPONENT_PWM2]    = { MTK_DISP_PWM,       2, NULL },
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h 
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index 5aa52b7..1a55496 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -29,6 +29,7 @@ enum mtk_ddp_comp_type {
        MTK_DISP_UFOE,
        MTK_DSI,
        MTK_DPI,
+       MTK_DISP_POSTMASK,
        MTK_DISP_PWM,
        MTK_DISP_MUTEX,
        MTK_DISP_OD,
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h 
b/include/linux/soc/mediatek/mtk-mmsys.h
index 42476c2..09ee424 100644
--- a/include/linux/soc/mediatek/mtk-mmsys.h
+++ b/include/linux/soc/mediatek/mtk-mmsys.h
@@ -31,6 +31,7 @@ enum mtk_ddp_comp_id {
        DDP_COMPONENT_OVL_2L1,
        DDP_COMPONENT_OVL_2L2,
        DDP_COMPONENT_OVL1,
+       DDP_COMPONENT_POSTMASK0,
        DDP_COMPONENT_PWM0,
        DDP_COMPONENT_PWM1,
        DDP_COMPONENT_PWM2,
-- 
1.8.1.1.dirty