For the firmware-first error handling on ARM64 hardware platforms, CPU cache corrected error count is not recorded. Create an CPU EDAC device and device blocks for the CPU caches for this purpose. The EDAC device blocks are created based on the cache information from the cpu_cacheinfo.
User-space application could monitor the recorded corrected error count for the predictive failure analysis. More information in the patch headers. Shiju Jose (2): EDAC/ghes: Add EDAC device for the CPU caches ACPI / APEI: Add reporting ARM64 CPU cache corrected error count Documentation/ABI/testing/sysfs-devices-edac | 15 ++ drivers/acpi/apei/ghes.c | 76 ++++++++- drivers/edac/Kconfig | 10 ++ drivers/edac/ghes_edac.c | 171 +++++++++++++++++++ include/acpi/ghes.h | 27 +++ include/linux/cper.h | 4 + 6 files changed, 299 insertions(+), 4 deletions(-) -- 2.17.1
