On Dec 15, 2007 8:00 AM, Siddha, Suresh B <[EMAIL PROTECTED]> wrote: > On Fri, Dec 14, 2007 at 12:28:25AM +0000, Dave Airlie wrote: > > Yes, the main use for GPUs is to have RAM pages mapped WC, and placed into > > a GART on the GPU side, currently for Intel IGD we are okay as the CPU can > > access the GPU GART aperture, but other chips exist where this isn't > > possible, I think poulsbo and possible some of the AMD IGPs.. > > Ok. So how is it working today on these platforms with no PAT support. > Open source drivers use UC or WB on these platforms? As this RAM is not > contiguous, one can't use MTRRs to set WC. Right? > > Well, if WC is needed for RAM, then we have to address it too. >
It doesn't work really, which is mostly the problem :) We mostly use UC on these pages, or WB within cache coherent domains. mtrrs are totally useless in this situation. Dave. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
