Hi YouChing,
YouChing Lin <ycl...@mxic.com.tw> wrote on Wed, 4 Nov 2020 19:47:22
+0800:
> The Macronix MX35LF2GE4AD / MX35LF4GE4AD are 3V, 2G / 4Gbit serial
> SLC NAND flash device (with on-die ECC).
>
> Validated by read, erase, read back, write, read back and nandtest
> on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host
> (drivers/spi/spi-mxic.c).
>
> Signed-off-by: YouChing Lin <ycl...@mxic.com.tw>
> ---
> drivers/mtd/nand/spi/macronix.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
> index 8e801e4..4f7f954 100644
> --- a/drivers/mtd/nand/spi/macronix.c
> +++ b/drivers/mtd/nand/spi/macronix.c
> @@ -119,6 +119,26 @@ static int mx35lf1ge4ab_ecc_get_status(struct
> spinand_device *spinand,
> &update_cache_variants),
> SPINAND_HAS_QE_BIT,
> SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
> + SPINAND_INFO("MX35LF2GE4AD",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x26),
> + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0 /*SPINAND_HAS_QE_BIT*/,
What is the purpose of this comment? Shouldn't get rid of it and just
keep '0' if the QE bit is not supported?
> + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> + mx35lf1ge4ab_ecc_get_status)),
> + SPINAND_INFO("MX35LF4GE4AD",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x37),
> + NAND_MEMORG(1, 4096, 128, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0 /*SPINAND_HAS_QE_BIT*/,
Ditto
> + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> + mx35lf1ge4ab_ecc_get_status)),
> SPINAND_INFO("MX31LF1GE4BC",
> SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
> NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
Thanks,
Miquèl
