On Thu, Oct 08, 2020 at 02:26:21AM +0200, Andrew Lunn wrote: > On Wed, Oct 07, 2020 at 05:46:33PM -0400, Vivek Unune wrote: > > On Wed, Oct 07, 2020 at 11:01:34PM +0200, Andrew Lunn wrote: > > > On Wed, Oct 07, 2020 at 03:01:50PM -0400, Vivek Unune wrote: > > > > Forgo the use of mmioreg mdio mux infavor of the pinctrl > > > > > > Hi Vivek > > > > > > Could you add some more details please. I don't know this > > > hardware. I'm assuming there are two MDIO busses, external as talked > > > about in the comments, and an internal one? And for this hardware you > > > only need one of them? But i don't see what pinmux has to do with > > > this? > > Hi Andrew, > > > > There are indeed two mdio busses. To access the external bus, 9th bit > > of the mdio register has to be set. And to enable mii function, > > one has to set the registers 6 & 7 which is part of the pin controller. > > Earlier the pin controller was not defined and I resorted to use a > > combination of memory mapped io mux to change desired bits. > > > > Now that we have a pin controller - which is resposnsible for other > > functionality such as pwm, i2c, uart2, it makes sense to have a consistent > > device tree > > What makes it confusing is that you make multiple changes at once. It > would be easier to follow if you added the pinmux and removed the > mmioreg mux, and move the switch into the mdio-bus-mux node. Then in a > second patch rearrange the mdio-bus-mux. Small simple steps, with good > commit messages are much easier to follow and say, Yes, this is > correct. > Sure, le me declutter this.
Thanks, Vivek
