On Mon, Aug 31, 2020 at 11:20:34AM -0700, paul...@kernel.org wrote:
> From: "Paul E. McKenney" <paul...@kernel.org>
> 
> This commit adds a key entry enumerating the various types of relaxed
> operations.
> 
> Signed-off-by: Paul E. McKenney <paul...@kernel.org>
> ---
>  tools/memory-model/Documentation/cheatsheet.txt | 27 
> ++++++++++++++-----------
>  1 file changed, 15 insertions(+), 12 deletions(-)
> 
> diff --git a/tools/memory-model/Documentation/cheatsheet.txt 
> b/tools/memory-model/Documentation/cheatsheet.txt
> index 33ba98d..31b814d 100644
> --- a/tools/memory-model/Documentation/cheatsheet.txt
> +++ b/tools/memory-model/Documentation/cheatsheet.txt
> @@ -5,7 +5,7 @@
>  
>  Store, e.g., WRITE_ONCE()            Y                                       
> Y
>  Load, e.g., READ_ONCE()              Y                          Y   Y        
> Y
> -Unsuccessful RMW operation           Y                          Y   Y        
> Y
> +Relaxed operation                    Y                          Y   Y        
> Y
>  rcu_dereference()                    Y                          Y   Y        
> Y
>  Successful *_acquire()               R                   Y  Y   Y   Y    Y   
> Y
>  Successful *_release()         C        Y  Y    Y     W                      
> Y
> @@ -17,14 +17,17 @@ smp_mb__before_atomic()       CP        Y  Y    Y        
> a  a   a   a    Y
>  smp_mb__after_atomic()        CP        a  a    Y        Y  Y   Y   Y    Y
>  
>  
> -Key: C:      Ordering is cumulative
> -     P:      Ordering propagates
> -     R:      Read, for example, READ_ONCE(), or read portion of RMW
> -     W:      Write, for example, WRITE_ONCE(), or write portion of RMW
> -     Y:      Provides ordering
> -     a:      Provides ordering given intervening RMW atomic operation
> -     DR:     Dependent read (address dependency)
> -     DW:     Dependent write (address, data, or control dependency)
> -     RMW:    Atomic read-modify-write operation
> -     SELF:   Orders self, as opposed to accesses before and/or after
> -     SV:     Orders later accesses to the same variable
> +Key: Relaxed:  A relaxed operation is either a *_relaxed() RMW
> +               operation, an unsuccessful RMW operation, or one of
> +               the atomic_read() and atomic_set() family of operations.

To be accurate, atomic_set() doesn't return any value, so it cannot be
ordered against DR and DW ;-)

I think we can split the Relaxed family into two groups:

void Relaxed: atomic_set() or atomic RMW operations that don't return
              any value (e.g atomic_inc())

non-void Relaxed: a *_relaxed() RMW operation, an unsuccessful RMW
                  operation, or atomic_read().

And "void Relaxed" is similar to WRITE_ONCE(), only has "Self" and "SV"
equal "Y", while "non-void Relaxed" plays the same rule as "Relaxed"
in this patch.

Thoughts?

Regards,
Boqun


> +     C:        Ordering is cumulative
> +     P:        Ordering propagates
> +     R:        Read, for example, READ_ONCE(), or read portion of RMW
> +     W:        Write, for example, WRITE_ONCE(), or write portion of RMW
> +     Y:        Provides ordering
> +     a:        Provides ordering given intervening RMW atomic operation
> +     DR:       Dependent read (address dependency)
> +     DW:       Dependent write (address, data, or control dependency)
> +     RMW:      Atomic read-modify-write operation
> +     SELF:     Orders self, as opposed to accesses before and/or after
> +     SV:       Orders later accesses to the same variable
> -- 
> 2.9.5
> 

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