On Fri, Aug 14, 2020 at 07:27:08PM +0200, Andrey Konovalov wrote: > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > index 152d74f2cc9c..6880ddaa5144 100644 > --- a/arch/arm64/mm/proc.S > +++ b/arch/arm64/mm/proc.S > @@ -38,7 +38,7 @@ > /* PTWs cacheable, inner/outer WBWA */ > #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA > > -#ifdef CONFIG_KASAN_SW_TAGS > +#if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS) > #define TCR_KASAN_FLAGS TCR_TBI1 > #else > #define TCR_KASAN_FLAGS 0
I prefer to turn TBI1 on only if MTE is present. So on top of the v8 user series, just do this in __cpu_setup. -- Catalin
