Add support for the SPI NOR device used to boot up the system to the System on Module DT.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paters...@renesas.com> --- Hi all, This patch is part of series [1], since rest of the patches have been acked I am just resending patch 3/3 from the series. [1] https://patchwork.kernel.org/project/linux-renesas-soc/list/?series=333197 v1->v2 * Dropped #address-cells/#size-cells from flash node. * Added partitions for flash node. --- arch/arm/boot/dts/r8a7742-iwg21m.dtsi | 51 +++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi index 0f26807f92b8..5621c9ed698f 100644 --- a/arch/arm/boot/dts/r8a7742-iwg21m.dtsi +++ b/arch/arm/boot/dts/r8a7742-iwg21m.dtsi @@ -35,6 +35,16 @@ clock-frequency = <20000000>; }; +&gpio0 { + /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */ + qspi_en { + gpio-hog; + gpios = <18 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "QSPI_EN"; + }; +}; + &i2c0 { pinctrl-0 = <&i2c0_pins>; pinctrl-names = "default"; @@ -70,4 +80,45 @@ groups = "mmc1_data4", "mmc1_ctrl"; function = "mmc1"; }; + + qspi_pins: qspi { + groups = "qspi_ctrl", "qspi_data2"; + function = "qspi"; + }; +}; + +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash: flash@0 { + compatible = "sst,sst25vf016b", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + spi-cpol; + spi-cpha; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x00000000 0x000c0000>; + read-only; + }; + partition@c0000 { + label = "env"; + reg = <0x000c0000 0x00002000>; + }; + partition@c2000 { + label = "user"; + reg = <0x000c2000 0x0013e000>; + }; + }; + }; }; -- 2.17.1
