Adding rt1015 hw_params which set Bit-clock ratio PLL and appropriate
sys clk specific with RTK1015.
Signed-off-by: Ravulapati Vishnu vardhan rao
<vishnuvardhanrao.ravulap...@amd.com>
---
sound/soc/amd/acp3x-rt5682-max9836.c | 39 ++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/sound/soc/amd/acp3x-rt5682-max9836.c
b/sound/soc/amd/acp3x-rt5682-max9836.c
index 607205cb3a98..bf635ae928ae 100644
--- a/sound/soc/amd/acp3x-rt5682-max9836.c
+++ b/sound/soc/amd/acp3x-rt5682-max9836.c
@@ -126,6 +126,44 @@ static int rt5682_clk_enable(struct snd_pcm_substream
*substream)
return ret;
}
+static int acp3x_1015_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_dai *codec_dai;
+ int srate, i, ret;
+
+ ret = 0;
+ srate = params_rate(params);
+
+ for (i = 0; i < rtd->num_codecs; i++) {
+ if (strcmp(rtd->codec_dais[i]->name, "rt1015-aif"))
+ continue;
+ codec_dai = rtd->codec_dais[i];
+
+ ret = snd_soc_dai_set_bclk_ratio(codec_dai, 64);
+ if (ret < 0) {
+ dev_err(codec_dai->dev,
+ "codec_dai bclk ratio not set\n");
+ return ret;
+ }
+ ret = snd_soc_dai_set_pll(codec_dai, 0, RT1015_PLL_S_BCLK,
+ 64 * srate, 256 * srate);
+ if (ret < 0) {
+ dev_err(codec_dai->dev, "codec_dai PLL not set\n");
+ return ret;
+ }
+ ret = snd_soc_dai_set_sysclk(codec_dai, RT1015_SCLK_S_PLL,
+ 256 * srate, SND_SOC_CLOCK_IN);
+ if (ret < 0) {
+ dev_err(codec_dai->dev,
+ "codec_dai sys clock not set\n");
+ return ret;
+ }
+ }
+ return ret;
+}
+
static void rt5682_clk_disable(void)
{
clk_disable_unprepare(rt5682_dai_wclk);
@@ -231,6 +269,7 @@ static const struct snd_soc_ops acp3x_5682_ops = {
static const struct snd_soc_ops acp3x_max_play_ops = {
.startup = acp3x_max_startup,
.shutdown = rt5682_shutdown,
+ .hw_params = acp3x_1015_hw_params,
};
static const struct snd_soc_ops acp3x_ec_cap0_ops = {
--
2.17.1
