The following commit has been merged into the x86/cleanups branch of tip: Commit-ID: fbd5969d1ff2598143d6a6fbc9491a9e40ab9b82 Gitweb: https://git.kernel.org/tip/fbd5969d1ff2598143d6a6fbc9491a9e40ab9b82 Author: Borislav Petkov <b...@suse.de> AuthorDate: Thu, 04 Jun 2020 12:38:39 +02:00 Committer: Borislav Petkov <b...@suse.de> CommitterDate: Mon, 15 Jun 2020 19:26:23 +02:00
x86/cpufeatures: Mark two free bits in word 3 ... so that they get reused when needed. No functional changes. Signed-off-by: Borislav Petkov <b...@suse.de> Link: https://lkml.kernel.org/r/20200604104150.2056-1...@alien8.de --- arch/x86/include/asm/cpufeatures.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 02dabc9..c693ebf 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -96,6 +96,7 @@ #define X86_FEATURE_SYSCALL32 ( 3*32+14) /* "" syscall in IA32 userspace */ #define X86_FEATURE_SYSENTER32 ( 3*32+15) /* "" sysenter in IA32 userspace */ #define X86_FEATURE_REP_GOOD ( 3*32+16) /* REP microcode works well */ +/* free ( 3*32+17) */ #define X86_FEATURE_LFENCE_RDTSC ( 3*32+18) /* "" LFENCE synchronizes RDTSC */ #define X86_FEATURE_ACC_POWER ( 3*32+19) /* AMD Accumulated Power Mechanism */ #define X86_FEATURE_NOPL ( 3*32+20) /* The NOPL (0F 1F) instructions */ @@ -107,6 +108,7 @@ #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* Extended APICID (8 bits) */ #define X86_FEATURE_AMD_DCM ( 3*32+27) /* AMD multi-node processor */ #define X86_FEATURE_APERFMPERF ( 3*32+28) /* P-State hardware coordination feedback capability (APERF/MPERF MSRs) */ +/* free ( 3*32+29) */ #define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */ #define X86_FEATURE_TSC_KNOWN_FREQ ( 3*32+31) /* TSC has known frequency */
