From: Lori Hikichi <lhiki...@broadcom.com> Change from 'DIV_ROUND_UP' to 'DIV_ROUND_CLOSEST' when calculating the clock divisor in the iProc ASIU clock driver to allow to get to the closest clock rate.
Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support") Signed-off-by: Lori Hikichi <lhiki...@broadcom.com> Signed-off-by: Ray Jui <ray....@broadcom.com> --- drivers/clk/bcm/clk-iproc-asiu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/bcm/clk-iproc-asiu.c b/drivers/clk/bcm/clk-iproc-asiu.c index 6fb8af506777..e062dd4992ea 100644 --- a/drivers/clk/bcm/clk-iproc-asiu.c +++ b/drivers/clk/bcm/clk-iproc-asiu.c @@ -119,7 +119,7 @@ static long iproc_asiu_clk_round_rate(struct clk_hw *hw, unsigned long rate, if (rate == *parent_rate) return *parent_rate; - div = DIV_ROUND_UP(*parent_rate, rate); + div = DIV_ROUND_CLOSEST(*parent_rate, rate); if (div < 2) return *parent_rate; @@ -145,7 +145,7 @@ static int iproc_asiu_clk_set_rate(struct clk_hw *hw, unsigned long rate, return 0; } - div = DIV_ROUND_UP(parent_rate, rate); + div = DIV_ROUND_CLOSEST(parent_rate, rate); if (div < 2) return -EINVAL; -- 2.17.1