On Tue, May 26, 2020 at 03:07:16PM +0800, yuanjunqing wrote: > > 在 2020/5/25 下午4:42, Thomas Bogendoerfer 写道: > > On Mon, May 25, 2020 at 11:31:23AM +0800, YuanJunQing wrote: > >> Register "a1" is unsaved in this function, > >> when CONFIG_TRACE_IRQFLAGS is enabled, > >> the TRACE_IRQS_OFF macro will call trace_hardirqs_off(), > >> and this may change register "a1". > >> The variment of register "a1" may send SIGFPE signal > >> to task when call do_fpe(),and this may kill the task. > >> > >> Signed-off-by: YuanJunQing <yuanjunqin...@163.com> > >> --- > >> arch/mips/kernel/genex.S | 6 ++++-- > >> 1 file changed, 4 insertions(+), 2 deletions(-) > >> > >> diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S > >> index 8236fb291e3f..956a76429773 100644 > >> --- a/arch/mips/kernel/genex.S > >> +++ b/arch/mips/kernel/genex.S > >> @@ -480,16 +480,18 @@ NESTED(nmi_handler, PT_SIZE, sp) > >> /* gas fails to assemble cfc1 for some archs (octeon).*/ \ > >> .set mips1 > >> SET_HARDFLOAT > >> - cfc1 a1, fcr31 > >> + cfc1 s0, fcr31 > >> .set pop > >> CLI > >> TRACE_IRQS_OFF > >> + move a1,s0 > >> .endm > > do we realy need to read fcr31 that early ? Wouldn't it work to > > just move the cfc1 below TRACE_IRQS_OFF ? > > > > yes, it can work when we just move the cfc1 below TRACE_IRQS_OFF, > and the code is written as follows. > > CLI > TRACE_IRQS_OFF > .set mips1 > SET_HARDFLOAT > cfc1 a1, fcr31 > .set pop > .endm
good, could we do the same with _cfcmsa a1, MSA_CSR in the msa case ? Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
