On Mon, Sep 23, 2019 at 06:14:04PM +0200, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Soc Multi Core Timer bindings to DT schema format
> using json-schema.
> 
> Signed-off-by: Krzysztof Kozlowski <k...@kernel.org>
> 
> ---
> 
> Changes since v3:
> 1. Use interrupts-extended instead of interrupts-map.

This is a binding change. You should mention it in the commit.

> 
> Changes since v1:
> 1. Indent example with four spaces (more readable),
> 2. Rename nodes in example to timer,
> 3. Remove mct-map subnode.
> ---
>  .../bindings/timer/samsung,exynos4210-mct.txt |  88 ------------
>  .../timer/samsung,exynos4210-mct.yaml         | 125 ++++++++++++++++++
>  2 files changed, 125 insertions(+), 88 deletions(-)
>  delete mode 100644 
> Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
>  create mode 100644 
> Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> 
> diff --git 
> a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt 
> b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> deleted file mode 100644
> index 8f78640ad64c..000000000000
> --- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt
> +++ /dev/null
> @@ -1,88 +0,0 @@
> -Samsung's Multi Core Timer (MCT)
> -
> -The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> -global timer and CPU local timers. The global timer is a 64-bit free running
> -up-counter and can generate 4 interrupts when the counter reaches one of the
> -four preset counter values. The CPU local timers are 32-bit free running
> -down-counters and generate an interrupt when the counter expires. There is
> -one CPU local timer instantiated in MCT for every CPU in the system.
> -
> -Required properties:
> -
> -- compatible: should be "samsung,exynos4210-mct".
> -  (a) "samsung,exynos4210-mct", for mct compatible with Exynos4210 mct.
> -  (b) "samsung,exynos4412-mct", for mct compatible with Exynos4412 mct.
> -
> -- reg: base address of the mct controller and length of the address space
> -  it occupies.
> -
> -- interrupts: the list of interrupts generated by the controller. The 
> following
> -  should be the order of the interrupts specified. The local timer interrupts
> -  should be specified after the four global timer interrupts have been
> -  specified.
> -
> -     0: Global Timer Interrupt 0
> -     1: Global Timer Interrupt 1
> -     2: Global Timer Interrupt 2
> -     3: Global Timer Interrupt 3
> -     4: Local Timer Interrupt 0
> -     5: Local Timer Interrupt 1
> -     6: ..
> -     7: ..
> -     i: Local Timer Interrupt n
> -
> -  For MCT block that uses a per-processor interrupt for local timers, such
> -  as ones compatible with "samsung,exynos4412-mct", only one local timer
> -  interrupt might be specified, meaning that all local timers use the same
> -  per processor interrupt.
> -
> -Example 1: In this example, the IP contains two local timers, using separate
> -        interrupts, so two local timer interrupts have been specified,
> -        in addition to four global timer interrupts.
> -
> -     mct@10050000 {
> -             compatible = "samsung,exynos4210-mct";
> -             reg = <0x10050000 0x800>;
> -             interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> -                          <0 42 0>, <0 48 0>;
> -     };
> -
> -Example 2: In this example, the timer interrupts are connected to two 
> separate
> -        interrupt controllers. Hence, an interrupt-map is created to map
> -        the interrupts to the respective interrupt controllers.
> -
> -     mct@101c0000 {
> -             compatible = "samsung,exynos4210-mct";
> -             reg = <0x101C0000 0x800>;
> -             interrupt-parent = <&mct_map>;
> -             interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
> -
> -             mct_map: mct-map {
> -                     #interrupt-cells = <1>;
> -                     #address-cells = <0>;
> -                     #size-cells = <0>;
> -                     interrupt-map = <0 &gic 0 57 0>,
> -                                     <1 &gic 0 69 0>,
> -                                     <2 &combiner 12 6>,
> -                                     <3 &combiner 12 7>,
> -                                     <4 &gic 0 42 0>,
> -                                     <5 &gic 0 48 0>;
> -             };
> -     };
> -
> -Example 3: In this example, the IP contains four local timers, but using
> -        a per-processor interrupt to handle them. Either all the local
> -        timer interrupts can be specified, with the same interrupt specifier
> -        value or just the first one.
> -
> -     mct@10050000 {
> -             compatible = "samsung,exynos4412-mct";
> -             reg = <0x10050000 0x800>;
> -
> -             /* Both ways are possible in this case. Either: */
> -             interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> -                          <0 42 0>;
> -             /* or: */
> -             interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> -                          <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> -     };
> diff --git 
> a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml 
> b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> new file mode 100644
> index 000000000000..bff3f54a398f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
> @@ -0,0 +1,125 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos SoC Multi Core Timer (MCT)
> +
> +maintainers:
> +  - Krzysztof Kozlowski <k...@kernel.org>
> +
> +description: |+
> +  The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
> +  global timer and CPU local timers. The global timer is a 64-bit free 
> running
> +  up-counter and can generate 4 interrupts when the counter reaches one of 
> the
> +  four preset counter values. The CPU local timers are 32-bit free running
> +  down-counters and generate an interrupt when the counter expires. There is
> +  one CPU local timer instantiated in MCT for every CPU in the system.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - samsung,exynos4210-mct
> +      - samsung,exynos4412-mct
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    description: |
> +      Interrupts should be put in specific order. This is, the local timer
> +      interrupts should be specified after the four global timer interrupts
> +      have been specified:
> +      0: Global Timer Interrupt 0
> +      1: Global Timer Interrupt 1
> +      2: Global Timer Interrupt 2
> +      3: Global Timer Interrupt 3
> +      4: Local Timer Interrupt 0
> +      5: Local Timer Interrupt 1
> +      6: ..
> +      7: ..
> +      i: Local Timer Interrupt n
> +      For MCT block that uses a per-processor interrupt for local timers, 
> such
> +      as ones compatible with "samsung,exynos4412-mct", only one local timer
> +      interrupt might be specified, meaning that all local timers use the 
> same
> +      per processor interrupt.
> +    minItems: 5               # 4 Global + 1 local
> +    maxItems: 20              # 4 Global + 16 local
> +
> +  interrupts-extended:

No need for this. Just document 'interrupts' and the tooling takes care 
of supporting 'interrupts-extended' too.

> +    description: |
> +      If interrupts are coming from different controllers, this property
> +      can be used instead of regular "interrupts" property.
> +      The format is exactly the same as with "interrupts".
> +      Interrupts should be put in specific order. This is, the local timer
> +    minItems: 5               # 4 Global + 1 local
> +    maxItems: 20              # 4 Global + 16 local
> +
> +required:
> +  - compatible
> +  - interrupts
> +  - reg
> +
> +allOf:
> +  - if:
> +      not:
> +        required:
> +          - interrupts
> +    then:
> +      required:
> +        - interrupts-extended

And this is taken care of too.

> +
> +examples:
> +  - |
> +    // In this example, the IP contains two local timers, using separate
> +    // interrupts, so two local timer interrupts have been specified,
> +    // in addition to four global timer interrupts.
> +
> +    timer@10050000 {
> +        compatible = "samsung,exynos4210-mct";
> +        reg = <0x10050000 0x800>;
> +        interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> +                     <0 42 0>, <0 48 0>;
> +    };
> +
> +  - |
> +    // In this example, the timer interrupts are connected to two separate
> +    // interrupt controllers. Hence, an interrupts-extended is needed.
> +
> +    timer@101c0000 {
> +        compatible = "samsung,exynos4210-mct";
> +        reg = <0x101C0000 0x800>;
> +        interrupts-extended = <&gic 0 57 0>,
> +                              <&gic 0 69 0>,
> +                              <&combiner 12 6>,
> +                              <&combiner 12 7>,
> +                              <&gic 0 42 0>,
> +                              <&gic 0 48 0>;
> +    };
> +
> +  - |
> +    // In this example, the IP contains four local timers, but using
> +    // a per-processor interrupt to handle them. Only one first local
> +    // interrupt is specified.
> +
> +    timer@10050000 {
> +        compatible = "samsung,exynos4412-mct";
> +        reg = <0x10050000 0x800>;
> +
> +        interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> +                     <0 42 0>;
> +    };
> +
> +  - |
> +    // In this example, the IP contains four local timers, but using
> +    // a per-processor interrupt to handle them. All the local timer
> +    // interrupts are specified.
> +
> +    timer@10050000 {
> +        compatible = "samsung,exynos4412-mct";
> +        reg = <0x10050000 0x800>;
> +
> +        interrupts = <0 57 0>, <0 69 0>, <0 70 0>, <0 71 0>,
> +                     <0 42 0>, <0 42 0>, <0 42 0>, <0 42 0>;
> +    };
> -- 
> 2.17.1
> 

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