Hello Linus,
Thanks for your review! I just submitted v8 to the list, please help to review
it again.
Since you have already merged the dt-binding document [v7 1/2], and I don't
have your
update to this file, so to avoid confusion, I only include the driver code in
v8.
Regards,
--Hongwei
> From: Linus Walleij <linus.wall...@linaro.org>
> Sent: Wednesday, August 14, 2019 4:09 AM
> To: Hongwei Zhang
> Cc: Andrew Jeffery; open list:GPIO SUBSYSTEM; Joel Stanley; linux-aspeed;
> Bartosz Golaszewski;
> linux-kernel@vger.kernel.org; Linux ARM
> Subject: Re: [v7 2/2] gpio: aspeed: Add SGPIO driver
>
> Hi Hongwei,
>
> thanks for your patch!
>
> I have now merged the bindings so you only need to respin this patch.
>
> On Wed, Jul 31, 2019 at 10:02 PM Hongwei Zhang <hongw...@ami.com> wrote:
>
> > Add SGPIO driver support for Aspeed AST2500 SoC.
> >
> > Signed-off-by: Hongwei Zhang <hongw...@ami.com>
> > Reviewed-by: Andrew Jeffery <and...@aj.id.au>
>
> I guess I need to go with this, there are some minor things I still want to
> be fixed:
>
> > +static void __aspeed_sgpio_set(struct gpio_chip *gc, unsigned int
> > +offset, int val)
>
> I don't like __underscore_functions because their semantic is ambiguous.
>
done, please see v8.
> Rename this something like aspeed_sgpio_commit() or whatever best fits the
> actual use.
>
> > +static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
> > + struct platform_device *pdev) {
> (...)
> > + rc = gpiochip_irqchip_add(&gpio->chip, &aspeed_sgpio_irqchip,
> > + 0, handle_bad_irq, IRQ_TYPE_NONE);
> (...)
> > + gpiochip_set_chained_irqchip(&gpio->chip, &aspeed_sgpio_irqchip,
> > + gpio->irq,
> > + aspeed_sgpio_irq_handler);
>
> We do not set up chained irqchips like this anymore, sorry.
>
> I am currently rewriting all existing chained drivers to pass an initialized
> irqchip when registering the
> whole gpio chip.
> See drivers/gpio/TODO.
>
> Here are examples:
> https://lore.kernel.org/linux-gpio/20190811080539.15647-1-linus.wall...@linaro.org/
> https://lore.kernel.org/linux-gpio/20190812132554.18313-1-linus.wall...@linaro.org/
>
done, please see v8.
> > + /* set all SGPIO pins as input (1). */
> > + memset(gpio->dir_in, 0xff, sizeof(gpio->dir_in));
>
> Do the irqchip set-up here, before adding the gpio_chip.
>
> > + rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
> > + if (rc < 0)
> > + return rc;
> > +
> > + return aspeed_sgpio_setup_irqs(gpio, pdev);
>
> Yours,
> Linus Walleij
