On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> Prepare FlexCAN use on SODIMM 55/63 178/188. Those SODIMM pins are
> compatible for CAN bus use with several modules from the Colibri
> family.
> Add Better drivestrength and also add flexcan2.
>
> Signed-off-by: Philippe Schenker <philippe.schen...@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswi...@toradex.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++++++---
> --
> 1 file changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index f7c9ce5bed47..52046085ce6f 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -117,6 +117,18 @@
> fsl,magic-packet;
> };
>
> +&flexcan1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + status = "disabled";
> +};
> +
> +&flexcan2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + status = "disabled";
> +};
> +
> &gpmi {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_gpmi_nand>;
> @@ -330,12 +342,11 @@
>
> &iomuxc {
> pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> &pinctrl_gpio4>;
> + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> &pinctrl_gpio4
> + &pinctrl_gpio7>;
>
> pinctrl_gpio1: gpio1-grp {
> fsl,pins = <
> - MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74
> /* SODIMM 55 */
> - MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74
> /* SODIMM 63 */
> MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /*
> SODIMM 77 */
> MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14
> /* SODIMM 89 */
> MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74
> /* SODIMM 91 */
> @@ -416,6 +427,13 @@
> >;
> };
>
> + pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14
> /* SODIMM 55 */
> + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
> fsl,pins = <
> MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
> @@ -459,10 +477,17 @@
> >;
> };
>
> + pinctrl_flexcan1: flexcan1-grp {
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79
> /* SODIMM 55 */
> + MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_flexcan2: flexcan2-grp {
> fsl,pins = <
> - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
> - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
> + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /*
> SODIMM 188 */
> + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /*
> SODIMM 178 */
> >;
> };
