On 08.08.2019 08:21, Yonglong Liu wrote:
>
>
> On 2019/8/8 14:11, Heiner Kallweit wrote:
>> On 08.08.2019 03:15, Yonglong Liu wrote:
>>>
>>>
>>> On 2019/8/8 0:47, Heiner Kallweit wrote:
>>>> On 07.08.2019 15:16, Yonglong Liu wrote:
>>>>> [ 27.232781] hns3 0000:bd:00.3 eth7: net open
>>>>> [ 27.237303] 8021q: adding VLAN 0 to HW filter on device eth7
>>>>> [ 27.242972] IPv6: ADDRCONF(NETDEV_CHANGE): eth7: link becomes ready
>>>>> [ 27.244449] hns3 0000:bd:00.3: invalid speed (-1)
>>>>> [ 27.253904] hns3 0000:bd:00.3 eth7: failed to adjust link.
>>>>> [ 27.259379] RTL8211F Gigabit Ethernet mii-0000:bd:00.3:07: PHY state
>>>>> change UP -> RUNNING
>>>>> [ 27.924903] hns3 0000:bd:00.3 eth7: link up
>>>>> [ 28.280479] RTL8211F Gigabit Ethernet mii-0000:bd:00.3:07: PHY state
>>>>> change RUNNING -> NOLINK
>>>>> [ 29.208452] hns3 0000:bd:00.3 eth7: link down
>>>>> [ 32.376745] RTL8211F Gigabit Ethernet mii-0000:bd:00.3:07: PHY state
>>>>> change NOLINK -> RUNNING
>>>>> [ 33.208448] hns3 0000:bd:00.3 eth7: link up
>>>>> [ 35.253821] hns3 0000:bd:00.3 eth7: net stop
>>>>> [ 35.258270] hns3 0000:bd:00.3 eth7: link down
>>>>>
>>>>> When using rtl8211f in polling mode, may get a invalid speed,
>>>>> because of reading a fake link up and autoneg complete status
>>>>> immediately after starting autoneg:
>>>>>
>>>>> ifconfig-1176 [007] .... 27.232763: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x00 val:0x1040
>>>>> kworker/u257:1-670 [015] .... 27.232805: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x04 val:0x01e1
>>>>> kworker/u257:1-670 [015] .... 27.232815: mdio_access:
>>>>> mii-0000:bd:00.3 write phy:0x07 reg:0x04 val:0x05e1
>>>>> kworker/u257:1-670 [015] .... 27.232869: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x01 val:0x79ad
>>>>> kworker/u257:1-670 [015] .... 27.232904: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x09 val:0x0200
>>>>> kworker/u257:1-670 [015] .... 27.232940: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x00 val:0x1040
>>>>> kworker/u257:1-670 [015] .... 27.232949: mdio_access:
>>>>> mii-0000:bd:00.3 write phy:0x07 reg:0x00 val:0x1240
>>>>> kworker/u257:1-670 [015] .... 27.233003: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x01 val:0x79ad
>>>>> kworker/u257:1-670 [015] .... 27.233039: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x0a val:0x3002
>>>>> kworker/u257:1-670 [015] .... 27.233074: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x09 val:0x0200
>>>>> kworker/u257:1-670 [015] .... 27.233110: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x05 val:0x0000
>>>>> kworker/u257:1-670 [000] .... 28.280475: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x01 val:0x7989
>>>>> kworker/u257:1-670 [000] .... 29.304471: mdio_access:
>>>>> mii-0000:bd:00.3 read phy:0x07 reg:0x01 val:0x7989
>>>>>
>>>>> According to the datasheet of rtl8211f, to get the real time
>>>>> link status, need to read MII_BMSR twice.
>>>>>
>>>>> This patch add a read_status hook for rtl8211f, and do a fake
>>>>> phy_read before genphy_read_status(), so that can get real link
>>>>> status in genphy_read_status().
>>>>>
>>>>> Signed-off-by: Yonglong Liu <liuyongl...@huawei.com>
>>>>> ---
>>>>> drivers/net/phy/realtek.c | 13 +++++++++++++
>>>>> 1 file changed, 13 insertions(+)
>>>>>
>>>> Is this an accidental resubmit? Because we discussed this in
>>>> https://marc.info/?t=156413509900003&r=1&w=2 and a fix has
>>>> been applied already.
>>>>
>>>> Heiner
>>>>
>>>> .
>>>>
>>>
>>> In https://marc.info/?t=156413509900003&r=1&w=2 , the invalid speed
>>> recurrence rate is almost 100%, and I had test the solution about
>>> 5 times and it works. But yesterday it happen again suddenly, and than
>>> I fount that the recurrence rate reduce to 10%. This time we get 0x79ad
>>> after autoneg started which is not 0x798d from last discussion.
>>>
>>>
>>>
>> OK, I'll have a look.
>> However the approach is wrong. The double read is related to the latching
>> of link-down events. This is done by all PHY's and not specific to RT8211F.
>> Also it's not related to the problem. I assume any sufficient delay would
>> do instead of the read.
>>
>> .
>>
>
> So you will send a new patch to fix this problem? I am waiting for it,
> and can do a full test this time.
>
>
Can you try the following? This delay should give thy PHY enough time
to clear both bits before the following read is done.
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index ef7aa738e..32f327a44 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -568,6 +568,11 @@ int phy_start_aneg(struct phy_device *phydev)
if (err < 0)
goto out_unlock;
+ /* The PHY may not yet have cleared aneg-completed and link-up bit
+ * w/o this delay when the following read is done.
+ */
+ usleep_range(1000, 2000);
+
if (phy_is_started(phydev))
err = phy_check_link_status(phydev);
out_unlock:
--
2.22.0
