From: John Hubbard <jhubb...@nvidia.com> The HMM_MIRROR option in Kconfig is a little underdocumented and mysterious, and leaves people wondering whether to enable it.
Add text explaining just a little bit more about HMM, and also mention which hardware would benefit from having HMM_MIRROR enabled. Suggested-by: Pavel Machek <pa...@ucw.cz> Cc: Balbir Singh <bsinghar...@gmail.com> Cc: Dan Williams <dan.j.willi...@intel.com> Cc: Jason Gunthorpe <j...@ziepe.ca> Cc: Jerome Glisse <jgli...@redhat.com> Cc: Christoph Hellwig <h...@infradead.org> Signed-off-by: John Hubbard <jhubb...@nvidia.com> --- Hi Pavel and all, does this help? I've tried to capture the key missing bits of documentation, but still keep it small, for Kconfig. thanks, John Hubbard NVIDIA mm/Kconfig | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/mm/Kconfig b/mm/Kconfig index 56cec636a1fc..2fcb92e7f696 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -681,11 +681,18 @@ config HMM_MIRROR depends on MMU && 64BIT select MMU_NOTIFIER help - Select HMM_MIRROR if you want to mirror range of the CPU page table of a - process into a device page table. Here, mirror means "keep synchronized". - Prerequisites: the device must provide the ability to write-protect its - page tables (at PAGE_SIZE granularity), and must be able to recover from - the resulting potential page faults. + This is Heterogeneous Memory Management (HMM) process address space + mirroring. + + HMM_MIRROR provides a way to mirror ranges of the CPU page tables + of a process into a device page table. Here, mirror means "keep + synchronized". Prerequisites: the device must provide the ability + to write-protect its page tables (at PAGE_SIZE granularity), and + must be able to recover from the resulting potential page faults. + + Select HMM_MIRROR if you have hardware that meets the above + description. An early, partial list of such hardware is: + an NVIDIA GPU >= Pascal, Mellanox IB >= mlx5, or an AMD GPU. config DEVICE_PRIVATE bool "Unaddressable device memory (GPU memory, ...)" -- 2.22.0