DT bindings for the Felix ethernet switch, consisting of the
VSC9959 switch core integrated as a PCIe endpoint device.
Signed-off-by: Claudiu Manoil <claudiu.man...@nxp.com>
---
.../devicetree/bindings/net/mscc-felix.txt | 77 +++++++++++++++++++
1 file changed, 77 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/mscc-felix.txt
diff --git a/Documentation/devicetree/bindings/net/mscc-felix.txt
b/Documentation/devicetree/bindings/net/mscc-felix.txt
new file mode 100644
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+++ b/Documentation/devicetree/bindings/net/mscc-felix.txt
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+Microsemi Felix network Switch
+==============================
+
+The Felix switch device is the Microsemi VSC9959 gigabit ethernet
+switch core integrated as a PCIe endpoint device.
+
+Required properties:
+- compatible : Should be "mscc,felix-switch"
+- reg : Specifies PCIe Device Number and Function
+ Number of the integrated endpoint device,
+ according to parent node bindings.
+- ethernet-ports: A container of child nodes representing
+ switch ports.
+
+"ethernet-ports" container has the following required properties:
+- #address-cells: Must be 1
+- #size-cells : Must be 0
+
+A list of child nodes representing switch ports is expected.
+Each child port node must have the following mandatory property:
+- reg : port id (address) in the switch (0..N-1)
+
+Port nodes may also contain the following optional standardised
+properties, described in corresponding binding documents:
+
+- phy-handle : Phandle to a PHY on a MDIO bus. See
+ Documentation/devicetree/bindings/net/ethernet.txt
+
+or,
+- fixed-link : "fixed-link" node, for internal ports or external
+ fixed-link connections. See
+ Documentation/devicetree/bindings/net/fixed-link.txt
+
+Example:
+
+ switch@0,5 {
+ compatible = "mscc,felix-switch"
+ reg = <0x000500 0 0 0 0>;
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* external ports */
+ switch_port0: port@0 {
+ reg = <0>;
+ phy-handle = <&phy0>;
+ };
+ switch_port1: port@1 {
+ reg = <1>;
+ phy-handle = <&phy1>;
+ };
+ switch_port2: port@2 {
+ reg = <2>;
+ phy-handle = <&phy2>;
+ };
+ switch_port3: port@3 {
+ reg = <3>;
+ phy-handle = <&phy3>;
+ };
+ /* internal to-cpu ports */
+ port@4 {
+ reg = <4>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ port@5 {
+ reg = <5>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
--
2.17.1
