On 06/06/2019 10:31, Julien Thierry wrote:
> Using IRQ priority masking to enable/disable interrupts is a bit
> sensitive as it requires to deal with both ICC_PMR_EL1 and PSR.I.
> 
> Introduce some validity checks to both highlight the states in which
> functions dealing with IRQ enabling/disabling can (not) be called, and
> bark a warning when called in an unexpected state.
> 
> Since these checks are done on hotpaths, introduce a build option to
> choose whether to do the checking.
> 
> Signed-off-by: Julien Thierry <julien.thie...@arm.com>
> Cc: Catalin Marinas <catalin.mari...@arm.com>
> Cc: Will Deacon <will.dea...@arm.com>
> ---
>  arch/arm64/Kconfig                  | 11 +++++++++++
>  arch/arm64/include/asm/cpufeature.h |  6 ++++++
>  arch/arm64/include/asm/daifflags.h  |  7 +++++++
>  arch/arm64/include/asm/irqflags.h   | 14 +++++++++++++-
>  4 files changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 697ea05..8acc40e 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -1436,6 +1436,17 @@ config ARM64_PSEUDO_NMI
> 
>         If unsure, say N
> 
> +if ARM64_PSEUDO_NMI
> +config ARM64_DEBUG_PRIORITY_MASKING
> +     bool "Debug interrupt priority masking"
> +     help
> +       This adds runtime checks to functions enabling/disabling
> +       interrupts when using priority masking. The additional checks verify
> +       the validity of ICC_PMR_EL1 when calling concerned functions.
> +
> +       If unsure, say N
> +endif
> +
>  config RELOCATABLE
>       bool
>       help
> diff --git a/arch/arm64/include/asm/cpufeature.h 
> b/arch/arm64/include/asm/cpufeature.h
> index bc895c8..693a086 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -617,6 +617,12 @@ static inline bool system_uses_irq_prio_masking(void)
>              cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING);
>  }
> 
> +static inline bool system_has_prio_mask_debugging(void)
> +{
> +     return IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING) &&
> +            system_uses_irq_prio_masking();
> +}
> +
>  #define ARM64_SSBD_UNKNOWN           -1
>  #define ARM64_SSBD_FORCE_DISABLE     0
>  #define ARM64_SSBD_KERNEL            1
> diff --git a/arch/arm64/include/asm/daifflags.h 
> b/arch/arm64/include/asm/daifflags.h
> index f93204f..eca5bee 100644
> --- a/arch/arm64/include/asm/daifflags.h
> +++ b/arch/arm64/include/asm/daifflags.h
> @@ -28,6 +28,10 @@
>  /* mask/save/unmask/restore all exceptions, including interrupts. */
>  static inline void local_daif_mask(void)
>  {
> +     WARN_ON(system_has_prio_mask_debugging() &&
> +             (read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF |
> +                                                 GIC_PRIO_PSR_I_SET)));
> +
>       asm volatile(
>               "msr    daifset, #0xf           // local_daif_mask\n"
>               :
> @@ -62,6 +66,9 @@ static inline void local_daif_restore(unsigned long flags)
>  {
>       bool irq_disabled = flags & PSR_I_BIT;
> 
> +     WARN_ON(system_has_prio_mask_debugging() &&
> +             !(read_sysreg(daif) & PSR_I_BIT));
> +
>       if (!irq_disabled) {
>               trace_hardirqs_on();
> 
> diff --git a/arch/arm64/include/asm/irqflags.h 
> b/arch/arm64/include/asm/irqflags.h
> index b6f757f..cac2d2a 100644
> --- a/arch/arm64/include/asm/irqflags.h
> +++ b/arch/arm64/include/asm/irqflags.h
> @@ -40,6 +40,12 @@
>   */
>  static inline void arch_local_irq_enable(void)
>  {
> +     if (system_has_prio_mask_debugging()) {
> +             u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
> +
> +             WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
> +     }
> +
>       asm volatile(ALTERNATIVE(
>               "msr    daifclr, #2             // arch_local_irq_enable\n"
>               "nop",
> @@ -53,6 +59,12 @@ static inline void arch_local_irq_enable(void)
> 
>  static inline void arch_local_irq_disable(void)
>  {
> +     if (system_has_prio_mask_debugging()) {
> +             u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
> +
> +             WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
> +     }
> +
>       asm volatile(ALTERNATIVE(
>               "msr    daifset, #2             // arch_local_irq_disable",
>               __msr_s(SYS_ICC_PMR_EL1, "%0"),
> @@ -86,7 +98,7 @@ static inline int arch_irqs_disabled_flags(unsigned long 
> flags)
> 
>       asm volatile(ALTERNATIVE(
>               "and    %w0, %w1, #" __stringify(PSR_I_BIT),
> -             "eor    %w0, %w1, #" __stringify(GIC_PRIO_IRQOFF),
> +             "eor    %w0, %w1, #" __stringify(GIC_PRIO_IRQON),

Err... Which version is the correct one? This one, or the previous one?

Thanks,

        M.
-- 
Jazz is not dead. It just smells funny...

Reply via email to