On 4/17/19 11:21, Takashi Iwai wrote:
On Wed, 17 Apr 2019 10:46:11 +0200,
<twisc...@de.adit-jv.com> wrote:
From: Timo Wischer <twisc...@de.adit-jv.com>
Since ARMv7 hardware cache coherence is supported.
"The SCU maintains coherency between the individual data caches in the
Cortex-A5 MPCore processor using a variation of the MOESI protocol" [1].
Therefore this patch enables the MMAP access to the status and control
structures. This avoids HWSYYNC ioctl calls and therefore lowers the CPU
usage.
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0434c/
BABJECBF.html
Interesting... I thought it would never work properly on ARM.
If it really works like that, I'd happily apply the change.
But I'd like to hear a confirmation from ARM people before merging
such an intensive change.
Hi Takashi,
do I need to send this patch to any other mailing list or do you think
some corresponding guy is already on the lists I have used?
thanks,
Takashi
Signed-off-by: Timo Wischer <twisc...@de.adit-jv.com>
---
sound/core/pcm_native.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index 1d84529..b8019ef 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -3225,7 +3225,8 @@ static __poll_t snd_pcm_poll(struct file *file,
poll_table *wait)
* Only on coherent architectures, we can mmap the status and the control
records
* for effcient data transfer. On others, we have to use HWSYNC ioctl...
*/
-#if defined(CONFIG_X86) || defined(CONFIG_PPC) || defined(CONFIG_ALPHA)
+#if defined(CONFIG_X86) || defined(CONFIG_PPC) || defined(CONFIG_ALPHA) || \
+ (defined(CONFIG_ARM) && defined(CONFIG_CPU_V7)) || defined(CONFIG_ARM64)
/*
* mmap status record
*/
--
2.7.4
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