[PATCH 18/21] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll()

[Andrey Smirnov]

Simplify bit operations in imx6_setup_phy_mpll() by using
GENMASK/FIELD_PREP. No functional change intended.

Cc: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
Cc: Bjorn Helgaas <bhelg...@google.com>
Cc: Fabio Estevam <fabio.este...@nxp.com>
Cc: Chris Healy <cphe...@gmail.com>
Cc: Lucas Stach <l.st...@pengutronix.de>
Cc: Leonard Crestez <leonard.cres...@nxp.com>
Cc: "A.s. Dong" <aisheng.d...@nxp.com>
Cc: Richard Zhu <hongxing....@nxp.com>
Cc: linux-...@nxp.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c 
b/drivers/pci/controller/dwc/pci-imx6.c
index 38c8e8baa077..678f5fa85e12 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -96,12 +96,10 @@ struct imx6_pcie {
 /* PHY registers (not memory-mapped) */
 #define PCIE_PHY_ATEOVRD                       0x10
 #define  PCIE_PHY_ATEOVRD_EN                   BIT(2)
-#define  PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT     0
-#define  PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK      0x1
+#define  PCIE_PHY_ATEOVRD_REF_CLKDIV           BIT(0)
 
 #define PCIE_PHY_MPLL_OVRD_IN_LO               0x11
-#define  PCIE_PHY_MPLL_MULTIPLIER_SHIFT                2
-#define  PCIE_PHY_MPLL_MULTIPLIER_MASK         0x7f
+#define  PCIE_PHY_MPLL_MULTIPLIER              GENMASK(8, 2)
 #define  PCIE_PHY_MPLL_MULTIPLIER_OVRD         BIT(9)
 
 #define PHY_RX_OVRD_IN_LO 0x1005
@@ -565,16 +563,14 @@ static int imx6_setup_phy_mpll(struct imx6_pcie 
*imx6_pcie)
        }
 
        pcie_phy_read(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, &val);
-       val &= ~(PCIE_PHY_MPLL_MULTIPLIER_MASK <<
-                PCIE_PHY_MPLL_MULTIPLIER_SHIFT);
-       val |= mult << PCIE_PHY_MPLL_MULTIPLIER_SHIFT;
+       val &= ~PCIE_PHY_MPLL_MULTIPLIER;
+       val |= FIELD_PREP(PCIE_PHY_MPLL_MULTIPLIER, mult);
        val |= PCIE_PHY_MPLL_MULTIPLIER_OVRD;
        pcie_phy_write(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, val);
 
        pcie_phy_read(imx6_pcie, PCIE_PHY_ATEOVRD, &val);
-       val &= ~(PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK <<
-                PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT);
-       val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT;
+       val &= ~PCIE_PHY_ATEOVRD_REF_CLKDIV;
+       val |= FIELD_PREP(PCIE_PHY_ATEOVRD_REF_CLKDIV, div);
        val |= PCIE_PHY_ATEOVRD_EN;
        pcie_phy_write(imx6_pcie, PCIE_PHY_ATEOVRD, val);
 
-- 
2.19.1