[PATCH linux-next v3 5/7] clk: renesas: r8a77965: Add ADG clock

[Jiada Wang]

From: Takeshi Kihara <takeshi.kihara...@renesas.com>

This patch adds ADG clock to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara...@renesas.com>
Signed-off-by: Jiada Wang <jiada_w...@mentor.com>
---
 drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c 
b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 1fcc411502da..3ce8b0b31647 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -211,6 +211,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] 
__initconst = {
        DEF_MOD("can-if0",              916,    R8A77965_CLK_S3D4),
        DEF_MOD("i2c6",                 918,    R8A77965_CLK_S0D6),
        DEF_MOD("i2c5",                 919,    R8A77965_CLK_S0D6),
+       DEF_MOD("adg",                  922,    R8A77965_CLK_S0D1),
        DEF_MOD("i2c-dvfs",             926,    R8A77965_CLK_CP),
        DEF_MOD("i2c4",                 927,    R8A77965_CLK_S0D6),
        DEF_MOD("i2c3",                 928,    R8A77965_CLK_S0D6),
-- 
2.19.2