Quoting Ryan Case (2018-09-20 15:40:54) > diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt > b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt > new file mode 100644 > index 000000000000..ecfb1e2bd520 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt > @@ -0,0 +1,36 @@ > +Qualcomm Quad Serial Peripheral Interface (QSPI) > + > +The QSPI controller allows SPI protocol communication in single, dual, or > quad > +wire transmission modes for read/write access to slaves such as NOR flash. > + > +Required properties: > +- compatible: Should contain: > + "qcom,sdm845-qspi"
Does someone have a more generic compatible string that can be added here to indicate the type of quad SPI controller this is? I really doubt this is a one-off hardware block for the specific SDM845 SoC. > +- reg: Should contain the base register location and length. > +- interrupts: Interrupt number used by the controller. > +- clocks: Should contain the core and AHB clock. > +- clock-names: Should be "core" for core clock and "iface" for AHB clock. > +
