On Thu, Jul 05, 2018 at 08:38:36PM +0200, Andrea Parri wrote: > > No, I'm definitely not pushing for anything stronger. I'm still just > > wondering if the name "RCsc" is right for what you described. For > > example, Andrea just said this in a parallel email: > > > > > "RCsc" as ordering everything except for W -> R, without the [extra] > > > barriers > > And I already regret it: the point is, different communities/people have > different things in mind when they use terms such as "RCsc" or "ordering" > and different communities seems to be represented in LKMM. > > Really, I don't think that this is simply a matter of naming (personally, > I'd be OK with "foo" or whather you suggested below! ;-)). My suggestion > would be: "get in there!! ;-) please let's refrain from using terms such > as these (_overly_ overloaded) "RCsc" and "order" when talking about MCM > let's rather talk, say, about "ppo", "cumul-fence" ...
... or bare litmus tests! Andrea > > Andrea > > > > > > If it's "RCsc with exceptions", doesn't it make sense to find a > > different name, rather than simply overloading the term "RCsc" with > > a subtly different meaning, and hoping nobody gets confused? > > > > I suppose on x86 and ARM you'd happen to get "true RCsc" anyway, just > > due to the way things are currently mapped: LOCKed RMWs and "true RCsc" > > instructions, respectively. But on Power and RISC-V, it would really > > be more "RCsc with a W->R exception", right? > > > > In fact, the more I think about it, this doesn't seem to be RCsc at all. > > It seems closer to "RCpc plus extra PC ordering between critical > > sections". No? > > > > The synchronization accesses themselves aren't sequentially consistent > > with respect to each other under the Power or RISC-V mappings, unless > > there's a hwsync in there somewhere that I missed? Or a rule > > preventing stw from forwarding to lwarx? Or some other higher-order > > effect preventing it from being observed anyway? > > > > So that's all I'm suggesting here. If you all buy that, maybe "RCpccs" > > for "RCpc with processor consistent critical section ordering"? > > I don't have a strong opinion on the name itself; I just want to find > > a name that's less ambiguous or overloaded. > > > > Dan
